CS8406-CSZ 查看數據表（PDF） - Cirrus Logic
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CS8406-CSZ Datasheet PDF : 42 Pages
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CS8406
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C MODE
(Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF)
Parameter
Symbol Min Typ Max
SCL Clock Frequency
fscl
-
-
100
Bus Free Time Between Transmissions
tbuf
4.7
-
-
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
-
Clock Low Time
tlow
4.7
-
-
Clock High Time
thigh
4.0
-
-
Setup Time for Repeated Start Condition
tsust
4.7
-
-
SDA Hold Time from SCL Falling
(Note 13)
thdd
0
-
-
SDA Setup Time to SCL Rising
tsud
250
-
-
Rise Time of Both SDA and SCL Lines
tr
-
-
1000
Fall Time of Both SDA and SCL Lines
tf
-
-
300
Setup Time for Stop Condition
tsusp
4.7
-
-
Units
kHz
μs
μs
μs
μs
μs
μs
ns
ns
ns
μs
13. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Stop Start
Repeated
Start
SDA
SCL
t buf
t hdst
t high
t hdst
tf
t low t hdd
t sud
t sust
tr
Figure 4. I²C Mode Timing
Stop
t susp
8
DS580F5
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