CS8406-CS 查看數據表（PDF） - Cirrus Logic
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CS8406-CS Datasheet PDF : 43 Pages
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CS8406
10.HARDWARE MODE
The CS8406 has a hardware mode that allows the use of the device without a microcontroller.
Hardware mode is selected by connecting the H/S pin to VL. The flexibility of the CS8406 is nec-
essarily limited in hardware mode. Various pins change function as described in the hardware
mode pin description section.
The hardware mode data flow is shown in Figure 12. Audio data is input through the serial audio
input port and routed to the AES3 transmitter.
10.1 Channel Status, User and Validity Data
The transmitted channel status, user and validity data can be input in two methods, determined
by the state of the CEN pin. Mode A is selected when the CEN pin is low. In mode A, the user bit
data and the validity bit are input through the U and V pins, clocked by both edges of ILRCK. The
channel status data is derived from the state of the COPY/C, ORIG, EMPH, and AUDIO pins.
Table 2 shows how the COPY/C and ORIG pins map to channel status bits. In consumer mode,
the transmitted category code is set to General (00h).
Mode B is selected when the CEN pin is high. In mode B, the channel status, user data bits and
the validity bit are input serially through the COPY/C, U and V pins. Data is clocked into these
pins at both edges of ILRCK. Figure 8 shows the timing requirements.
RST
VL
H/S
Output
Clock
Source
OMCK
ILRCK
ISCLK
SDIN
Serial
Audio
Input
AES3
Encoder
& Tx
C, U, V Data Buffer
TCBLD
TXP
TXN
TCBL
CEN
U
V
APMS SFMT1 SFMT0
COPY/C ORIG EMPH AUDIO
Power supply pins are omitted from this diagram.
Please refer to the Typical Connection Diagram for hook-up details.
Figure 12. Hardware Mode Data Flow
32
DS580F1
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