datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

CS8406-CS 查看數據表(PDF) - Cirrus Logic

零件编号
产品描述 (功能)
生产厂家
CS8406-CS Datasheet PDF : 43 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
CS8406
8.13 User Data Buffer Control (13h)
7
6
5
4
3
2
1
0
0
0
0
UD
UBM1
UBM0
0
EFTUI
UD - User bit data source specifier
Default = ‘0’
0 - U Pin is the source of transmitted U data
1 - U data buffer is the source of transmitted U data
UBM1:0 - Sets the operating mode of the AES3 User bit manager
Default = ‘00’
00 - Transmit all zeros mode
01 - Block mode
10 - Reserved
11 - Reserved
EFTUI - E to F U-data buffer transfer inhibit bit (valid in block mode only).
Default = ‘0’
0 - Allow U-data E to F buffer transfers
1 - Inhibit U-data E to F buffer transfers
8.14 Channel Status bit or User bit Data Buffer (20h - 37h)
Either the channel status data buffer E or the separate user bit data buffer E (provided UBM bits are set to block
mode) is accessible through these register addresses.
8.15 CS8406 I.D. and Version Register (7Fh) (Read Only)
7
6
5
4
3
2
1
0
ID3
ID2
ID1
ID0
VER3
VER2
VER1
VER0
ID[3:0] - ID code for the CS8406. Permanently set to 1110
VER[3:0] = 0001 (revision A)
VER[3:0] = 0010 (revision B)
DS580F1
29

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]