CS8403A-CS 查看數據表（PDF） - Cirrus Logic
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CS8403A-CS Datasheet PDF : 33 Pages
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CS8403A CS8404A
PIN DESCRIPTIONS
CS BIT 7 / CS BIT 3
PROFESSIONAL MODE
CS BIT 1 / FREQ. CTRL. 0
CS BIT 6 / CS BIT 2
MASTER CLOCK
SERIAL DATA CLOCK
FRAME SYNC
SERIAL INPUT DATA
VALIDITY INPUT
CS SERIAL IN / SC FRAME CLOCK
USER DATA INPUT
CS BIT 9 / CS BIT 15
CS8404A
C7/C3 1
PRO 2
C1/FC0 3
C6/C2 4
MCK 5
SCK 6
FSYNC 7
SDATA 8
V9
C/SBF 10
U 11
C9/C15 12
24 TRNPT/FC1 TRANSPARENT / FREQ. CTRL. 1
23 M2
SERIAL PORT MODE SELECT 2
22 M1
SERIAL PORT MODE SELECT 1
21 M0
SERIAL PORT MODE SELECT 0
20 TXP
TRANSMIT POSITIVE
19 VD+
POWER
18 GND
GROUND
17 TXN
TRANSMIT NEGATIVE
16 RST
MASTER RESET
15 CBL/SBC CS BLOCK OUT / SC BIT CLOCK
14 EM0/C9 EMPHASIS 0 / CS BIT 9
13 EM1/C8 EMPHASIS 1 / CS BIT 8
Power Supply Connections
VD+ - Positive Digital Power, PIN 19.
Positive supply for the digital section. Nominally +5 volts.
GND - Ground, PIN 18.
Ground for the digital section.
Audio Input Interface
SCK - Serial Clock, PIN 6.
Serial clock for SDATA pin which can be configured (via the M0, M1, and M2 pins) as an
input or output, and can sample data on the rising or falling edge. As an output, SCK will
contain 32 clocks for every audio sample. As an input, it does not need to be continuous and
can be up to 15 MHz.
FSYNC - Frame Sync, PIN 7.
Delineates the serial data and may indicate the particular channel, left or right, and may be an
input or output. The format is based on M0, M1, and M2 pins.
SDATA - Serial Data, PIN 8.
Audio data serial input pin.
M0, M1, M2 - Serial Port Mode Select, PINS 21, 22, 23.
Selects the format of FSYNC and the sample edge of SCK with respect to SDATA.
DS239PP1
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