CS8403A-CS 查看數據表（PDF） - Cirrus Logic
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CS8403A-CS Datasheet PDF : 33 Pages
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CS8403A CS8404A
PIN DESCRIPTIONS
DATA BUS BIT 4
DATA BUS BIT 5
DATA BUS BIT 6
DATA BUS BIT 7
MASTER CLOCK
SERIAL DATA CLOCK
FRAME SYNC
SERIAL INPUT DATA
ADDRESS BUS BIT 4
ADDRESS BUS BIT 3
ADDRESS BUS BIT 2
ADDRESS BUS BIT 1
CS8403A
D4 1
D5 2
D6 3
D7 4
MCK 5
SCK 6
FSYNC 7
SDATA 8
A4 9
A3 10
A2 11
A1 12
24 D3
23 D2
22 D1
21 D0
20 TXP
19 VD+
18 GND
17 TXN
16 RD/WR
15 INT
14 CS
13 A0
DATA BUS BIT 3
DATA BUS BIT 2
DATA BUS BIT 1
DATA BUS BIT 0
TRANSMIT POSITIVE
POWER
GROUND
TRANSMIT NEGATIVE
READ/WRITE SELECT
INTERRUPT
CHIP SELECT
ADDRESS BUS BIT 0
Power Supply Connections
VD+ - Positive Digital Power, PIN 19.
Positive supply for the digital section. Nominally +5 volts.
GND - Ground, PIN 18.
Ground for the digital section.
Audio Input Interface
SCK - Serial Clock, PIN 6.
Serial clock for SDATA pin which can be configured (via control register 3) as an input or
output, and can sample data on the rising or falling edge. As an output, SCK will contain 32
clocks for every audio sample. As an input, it does not need to be continuous and can be up to
15 MHz.
FSYNC - Frame Sync, PIN 7.
Delineates the serial data and may indicate the particular channel, left or right. Also, FSYNC
may be configured as an input or output. The format is based on bits in control register 3.
SDATA - Serial Data, PIN 8.
Audio data serial input pin.
Parallel Interface
CS - Chip Select, PIN 14.
This input is active low and allows access to the 32 bytes of internal memory. The address bus
and RD/WR must be valid while CS is low.
DS239PP1
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