CS61584A-IL5 查看數據表（PDF） - Cirrus Logic
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CS61584A-IL5 Datasheet PDF : 54 Pages
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DS261PP5
CS61584A
Vcc
2
2
REFCLK 1XCLK MODE RESET ZTX[1:2] LOS[1:2] P/S IPOL
SPOL CS INT SCLK SDO SDI
Clock Generator
TCLK1
Host Control
T1 1:N
TTIP1 0.47µ FC1
transmit
Framer
TPOS1 (TDATA1)
TNEG1 (AIS1)
RCLK1
Channel 1
TRING1
R1
T2 1:N
RTIP1 0.47µ F
RPOS1 (RDATA1)
receive
RNEG1 (BPV1)
Framer
TCLK2
TPOS2 (TDATA2)
TNEG2 (AIS2)
RCLK2
Channel 2
RRING1
R2
TTIP2 0.47µ FC2
T3 1:N
transmit
TRING2
RTIP2 R3
T4 1:N
0.47µ F
RPOS2 (RDATA2)
receive
RNEG2 (BPV2)
Power Supply
RRING2
R4
AV+ AGND BGREF TGND2 TV+2 TV+1 TGND1 RGND2 RV+2 RV+1 RGND1 DV+ DGND1:3
0.1 µ F
VCC
+
1 µF
R3
4.99kΩ 0.1 µ F
0.1 µ F
+
22 µ F
0.1 µ F
0.1 µF
3
0.01 µ F
Figure 28. Host Mode Serial Port Configuration
Vcc
Vcc
7
4
REFCLK 1XCLK MODE RESET P/S DTACK CS INT RD(DS) WR(R/W) ALE(AS) BTS AD[0:7] SAD[4:7]
Clock Generator
TCLK1
Host Control
T1 1:N
TTIP1 0.47µ FC1
transmit
Framer
TPOS1 (TDATA1)
TNEG1 (AIS1)
RCLK1
Channel 1
TRING1
R1
T2 1:N
RTIP1 0.47µ F
RPOS1 (RDATA1)
receive
RNEG1 (BPV1)
Framer
TCLK2
TPOS2 (TDATA2)
TNEG2 (AIS2)
RCLK2
Channel 2
RRING1
TTIP2
R2
0.47µ FC2
T3
1:N
transmit
TRING2
R3
RTIP2
T4 1:N
0.47µ F
RPOS2 (RDATA2)
receive
RNEG2 (BPV2)
Power Supply
RRING2
R4
AV+ AGND BGREF TGND2 TV+2 TV+1 TGND1 RGND2 RV+2 RV+1 RGND1 DV+ DGND1:3
0.1 µ F
VCC
+
1 µF
R3
4.99kΩ 0.1 µ F
0.1 µ F
+
22 µ F
0.1 µ F
0.1 µF
3
0.01 µ F
Figure 29. Host Mode Parallel Port Configuration
DS261FP1P5
49
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