CS5566(2008) 查看數據表（PDF） - Cirrus Logic

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CS5566
(Rev.:2008)

±2.5 V / 5 V, 5 kSps, 24-bit ∆Σ ADC

Cirrus Logic 

3/25/08

CS5566

3.8 AIN & VREF Sampling Structures

The CS5566 uses on-chip buffers on the AIN+, AIN-, and the VREF+ inputs. Buffers provide much higher

input impedance and therefore reduce the amount of drive current required from an external source. This

helps minimize errors.

The Buffer Enable (BUFEN) pin determines if the on-chip buffers are used or not. If the BUFEN pin is con-

nected to the V1+ supply, the buffers will be enabled. If the BUFEN pin is connected to the V1- pin, the

buffers are off. The converter will consume about 5 mW less power when the buffers are off, but the input

impedances of AIN+, AIN- and VREF+ will be significantly less than with the buffers enabled.

3.9 Converter Performance

The CS5566 achieves excellent differential nonlinearity (DNL). Figure 10 illustrates the code widths on

the typical scale of ±1 LSB and on a zoomed scale of ±0.2 LSB.

Figure 10. CS5566 DNL Plot

(Zoom View)

20

DS806PP1

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