CS5560(2008) 查看數據表（PDF） - Cirrus Logic

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CS5560
(Rev.:2008)

±2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ∆Σ ADC

Cirrus Logic 

3/25/08

CS5560

The following figure depicts the CS5560 device powered from a single 5V analog supply.

49.9

47pF

4.99k

49.9

47pF

4.99k

2.048 V

4.548 V

2.5 V

+0.452 V

+4.548 V

2.5 V

+0.452 V

4.096 V

4700pF

C0G

AIN+

4700pF

C0G

AIN-

CS5560

SMODE

CS

4SCLK

4SDO

RDY

+5 V

+4.096

Voltage

Reference

(NOTE 1)

(V+) Buffers On

BUFEN

(V-) Buffers Off

10 µF

VREF+

0.1 µF

VREF-

CONV

BP/UP

SLEEP

RST

50

MCLK

TST

+5 V

+3.3 V to 1.8 V

10

0.1 µF

0.1 µF

0.1 µF

X7R

V1+

V2+

V2-

DCR

V1-

VL

0.1 µF

VLR2

VLR

NOTES

1. See Section 3.3 Voltage Reference for information on

required voltage reference performance criteria.

2. Locate capacitors so as to minimize loop length.

3. V1-, V2-, and VLR should be connected to the same

ground plane under the chip.

4. SCLK and SDO may require pull-down resistors in

some applications.

Figure 7. CS5560 Configured Using a Single 5V Analog Supply

18

DS713PP1

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