CS5463-IS 查看數據表（PDF） - Cirrus Logic

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CS5463-IS

Single Phase, Bi-directional Power/Energy IC

Cirrus Logic 

CS5463

6.1.20 Control Register ( Ctrl )

Register Address: 28

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

STOP

7

6

5

4

3

2

1

0

INTOD

NOCPU

NOOSC

Default = 0x000000

STOP

Terminates the auto-boot sequence.

0 = Normal (default)

1 = Stop sequence

INTOD

Converts INT output pin to an open drain output.

0 = Normal (default)

1 = Open drain

NOCPU

Saves power by disabling the CPUCLK pin.

0 = Normal (default)

1 = Disables CPUCLK

NOOSC

Saves power by disabling the crystal oscillator.

0 = Normal (default)

1 = Disabling oscillator circuit

6.1.21 Harmonic Active Power Register ( PH )

Address: 29

MSB

LSB

-(20) 2-1

2-2

2-3

2-4

2-5

2-6

2-7

..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23

The Harmonic Active Power (PH) is calculated by subtracting the Fundamental Active Power from the Active

(Real) Power. The value is represented in two's complement notation and in the range of -1.0 ≤ PH < 1.0, with

the binary point to the right of the MSB.

6.1.22 Fundamental Active Power Register ( PF )

Address: 30

MSB

LSB

-(20) 2-1

2-2

2-3

2-4

2-5

2-6

2-7

..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23

The Fundamental Active Power (PF) is calculated by performing a discrete Fourier transform (DFT) at the rele-

vant frequency on the V and I channels. The results are multiplied to yield fundamental power. The value is rep-

resented in two's complement notation and in the range of -1.0 ≤ PH < 1.0, with the binary point to the right of

the MSB.

DS678F2

33

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