CS5461 查看數據表（PDF） - Cirrus Logic
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CS5461 Datasheet PDF : 45 Pages
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CS5461
ANALOG CHARACTERISTICS (Continued)
Parameter
Symbol Min
Power Supplies
Power Supply Currents (Active State)
IA+ PSCA
-
ID+ (VD+ = 5 V) PSCD
-
ID+ (VD+ = 3.3 V) PSCD
-
Power Consumption
(Note 5)
Active State (VD+ = 5 V) PC
-
Active State (VD+ = 3.3 V)
-
Stand-By State
-
Sleep State
-
Power Supply Rejection Ratio (Note 6)
(Gain = 10) PSRR
56
Current Channel (50, 60 Hz)
(Gain = 50) PSRR
70
Power Supply Rejection Ratio (Note 6)
(Gain = 10) PSRR
-
Voltage Channel (50, 60 Hz)
PFMON Low-Voltage Trigger Threshold
(Note 7) PMLO
2.3
PFMON High-Voltage Power-On Trip Point
(Note 8) PMHI
-
Typ
1.3
2.9
1.7
21
11.6
6.75
10
-
-
55
2.45
2.55
Max Unit
-
mA
-
mA
-
mA
30
mW
-
mW
-
mW
-
µW
-
dB
-
dB
-
dB
-
V
2.7
V
Notes: 4. The minimum FSCR is limited by the maximum allowed gain register value.
5. All outputs unloaded. All inputs CMOS level.
6. Definition for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 5 V, a 150 mV (zero-to-peak) (60 Hz) sinewave is imposed onto the +5 V DC supply
voltage at VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to VA-. Then the CS5461 is commanded to continuous
conversion acquisition mode, and digital output data is collected for the channel under test. The (zero-to-peak) value of the digital sinusoidal output
signal is determined, and this value is converted into the (zero-to-peak) value of the sinusoidal voltage (measured in mV) that would need to be
applied at the channel’s inputs, in order to cause the same digital sinusoidal output. This voltage is then defined as Veq. PSRR is then (in dB):
PSRR
=
20
⋅
log
⎧
⎨
⎩
-1---5---0-
Veq
⎫
⎬
⎭
7. When voltage level on PFMON is sagging, and LSD bit is at 0, the voltage at which LSD bit is set to 1.
8. If the LSD bit has been set to 1 (because PFMON voltage fell below PMLO), this is the voltage level on
PFMON at which the LSD bit can be permanently reset back to 0.
VOLTAGE REFERENCE
Parameter
Symbol Min
Typ
Max Unit
Reference Output
Output Voltage
REFOUT 2.4
-
2.6
V
Temperature Coefficient
(Note 9) TC
-
25
60 ppm/°C
Load Regulation
(Output Current 1 µA Source or Sink) ∆VR
-
6
10
mV
Reference Input
Input Voltage Range
VREFIN
2.4
2.5
2.6
V
Input Capacitance
-
4
-
pF
Input CVF Current
-
25
-
nA
Notes: 9. The voltage at VREFOUT is measured across the temperature range. From these measurements the
following formula is used to calculate the VREFOUT Temperature Coefficient:.
( ( ( TCVREF =
(VREFOUTMAX - VREFOUTMIN)
VREFOUTAVG
1
TAMAX - TAMIN
1.0 x 10 6
10
DS546F2
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