CS5371A-ISZ(2006) 查看數據表（PDF） - Cirrus Logic

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CS5371A-ISZ
(Rev.:2006)

Low-power, High-performance ∆Σ Modulators

Cirrus Logic 

DIGITAL CHARACTERISTICS (CONT.)

SYNC

CS5371A CS5372A

MCLK

(2.048 MHz)

MSYNC

t0

MDATA

(512 kHz)

MFLAG

TDATA

(256 kHz)

Figure 6. System Timing Diagram

MCLK

(2.048 MHz)

MSYNC

MDATA

(512 kHz)

MFLAG

12

tmss

tmsh

t0

tmsync

tmclk

tmdata

Figure 7. MCLK / MSYNC Timing Detail

DS748F1

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