CS4952-CL 查看數據表（PDF） - Cirrus Logic

零件编号

产品描述 (功能)

生产厂家

CS4952-CL

NTSC/PAL Digital Video Encoder

Cirrus Logic 

CS4952/53

Control Register 2

Address 0x02

Bit Number

7

Bit Name

Default

0

CONTROL_2

6

5

RESERVED

0

0

Read/Write

Default Value = 00h

4

3

2

1

0

SYNC_DLY XTAL SC_EN

0

0

0

0

0

Bit

Mnemonic

Function

7:4

-

reserved

Selects between 4.2 Mhz and 6 Mhz on-chip luminance low pass filters; default

3

Y_BW

value is zero which selects the 4.2 Mhz low pass filter option

Delays expected timing of first active pixel input data relative to falling edge of

HSYNC from 245 27 MHz clock cycles to 246 for NTSC and from 265 to 266 for

2

SYNC_DLY PAL. Default State is SYNC_DLY=0 for no delay

1

XTAL

Crystal oscillator for subcarrier adjustment enable (1: enable)

0

SC_EN

Chroma burst disable (1: disable)

DAC Power Down Register

Address 0x04

DAC

Bit Number

Bit Name

Default

7

C_75_PD

1

6

C_37_PD

1

5

Y_PD

1

Read/Write

Default Value = F0h

4

C_PD

1

3

C_75_EN

0

2

C_37_EN

0

1

Y_EN

0

0

C_EN

0

Bit

Mnemonic

Function

7

C_75_PD power down composite DAC with 75 Ω load (0: power up, 1: power down)

6

C_37_PD power down composite DAC with 37.5 Ω load (0: power up, 1: power down)

5

Y_PD

power down luma s-video DAC (0: power up, 1: power down)

4

C_PD

power down chroma s-video DAC (0: power up, 1: power down)

3

C_75_EN enable composite video DAC output for 75 Ω (0: tri-state, 1: enable)

2

C_37_EN enable composite video DAC output for 37.5 Ω (0: tri-state, 1: enable)

1

Y_EN

enable s-video DAC for luma output (0: tri-state, 1: enable)

0

C_EN

enable s-video DAC for chroma output (0: tri-state, 1: enable)

30

DS223PP2

Share Link: