CS4525 查看數據表（PDF） - Cirrus Logic

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CS4525

30 W Digital Audio Amplifier with Integrated ADC

Cirrus Logic 

CS4525

9.20.2 ADC Overflow Interrupt (ADCOvfl)

Function:

This bit is read only. When set, indicates that an over-range condition occurred anywhere in the CS4525

ADC signal path and has been clipped to positive or negative full scale as appropriate since the last read

of this register. This interrupt bit is an edge-triggered event and will be cleared following a read of this

register.

If this bit is set, indicating an ADC over-range condition, and the ADCOvflM bit is set, the INT pin will go

active. To determine the current overflow state of the ADC, read the ADCOvflSt bit in the interrupt status

register.

ADCOvfl Setting

ADC Overflow Event Status

0 .......................................... ADC overflow condition has not occurred since last read of this register.

1 .......................................... ADC overflow condition has occurred since last read of this register.

9.20.3 Channel Overflow Interrupt (ChOvfl)

Function:

This bit is read only. When set, indicates that the magnitude of an output sample on channel 1, 2, or the

Sub channel has exceeded full scale and has been clipped to positive or negative full scale as appropriate

since the last read of this register. This interrupt bit is an edge-triggered event and will be cleared following

a read of this register.

If this bit is set, indicating a channel over-range condition, and the ChOvflM bit is set, the INT pin will go

active. To determine the current overflow state of each channel, read the ChXOvflSt and SubOvflSt bits

in the interrupt status register.

ChOvfl Setting

Channel Overflow Event Status

0 .......................................... A channel overflow condition has not occurred since last read of this register.

1 .......................................... A channel overflow condition has occurred since last read of this register.

9.20.4 Amplifier Error Interrupt Bit (AmpErr)

Function:

This bit is read only. When set, indicates that an error was detected in the power amplifier section since

the last read of this register. This interrupt bit is an edge-triggered event and will be cleared following a

read of this register. This bit is the logical OR of all the bits in the amplifier error status register. Read the

amplifier error status register to determine which condition occurred.

If this bit is set, indicating an amplifier stage error condition, and the AmpErrM bit is set to a ‘1’b, the INT

pin will go active. To determine the actual current state of the amplifier error condition, read the amplifier

error status register.

AmpErr Setting

Amplifier Error Event Status

0 .......................................... An amplifier error condition has not occurred since last read of this register.

1 .......................................... An amplifier error condition has occurred since last read of this register.

9.20.5 Mask for SRC State (SRCLockM)

Default = 0

Function:

This bit serves as a mask for the SRC status interrupt source. If this bit is set, the SRCLock interrupt is

unmasked, meaning that if the SRCLock bit is set, the INT pin will go active. If the SRCLockM bit is

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DS726PP1

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