CS4525 查看數據表（PDF） - Cirrus Logic

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CS4525

30 W Digital Audio Amplifier with Integrated ADC

Cirrus Logic 

9.3 AUX Port Configuration (Address 03h)

7

EnAuxPort

6

5

DlyPortCfg1 DlyPortCfg0

4

AuxI²S/LJ

3

RChDSel1

2

RChDSel0

1

LChDSel1

CS4525

0

LChDSel0

9.3.1

Enable Aux Serial Port (EnAuxPort)

Default = 0

Function:

Controls the operation of the auxiliary serial port.

EnAuxPort Setting

Auxiliary Port State

0 .......................................... Auxiliary port disabled.

1 .......................................... Auxiliary port enabled.

9.3.2

Delay & Warning Port Configuration (DlyPortCfg[1:0])

Default = 00

Function:

Controls the operation of the delay and warning port. See “Serial Audio Delay & Warning Input Port” on

page 44 for more information.

DlyPortCfg[1:0] Setting Delay Port Configuration

00 ........................................ Port disabled.

01 ........................................ Port configured as serial audio delay interface.

10 ........................................ Port configured as an external thermal warning indicator for the foldback algorithm.

11......................................... Port disabled.

9.3.3

Aux/Delay Serial Port Digital Interface Format (AuxI²S/LJ)

Default = 0

Function:

Selects the serial audio interface format for the data on AUX_SDOUT, DLY_SDIN, DLY_SDOUT. The re-

quired relationship between the Left/Right clock, serial clock and serial data is defined by the Digital In-

terface Format and the options are detailed in the “Serial Audio Interfaces” on page 62.

AuxI²S/LJ Setting

Auxiliary/Delay Port Serial Audio Interface Format

0 .......................................... Left-Justified, up to 24-bit.

1 .......................................... I²S, up to 24-bit.

9.3.4

Aux Serial Port Right Channel Data Select (RChDSel[1:0])

Default = 01

Function:

Selects the data to be sent over the right channel of the auxiliary port serial data output signal.

RChDSel[1:0] Setting Aux Serial Port Right Channel Output Data Source

00 ........................................ Channel A.

01 ........................................ Channel B.

10 ........................................ Sub Channel.

11......................................... Channel B crossover high-pass output.

72

DS726PP1

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