CS4614
CrystalClear™ SoundFusion™ PCI Audio Accelerator
REQ# - Master Request, Three-State Output, Pin 85
REQ# indicates to the system arbiter that this device is requesting access to the PCI bus. This
pin is high-impedance when RST# is active.
GNT# - Master Grant, Input, Pin 84
GNT# is driven by the system arbiter to indicate to the device that the PCI bus has been
granted.
PERR# - Parity Error, I/O, Pin 24
PERR# is used for reporting data parity errors on the PCI bus.
SERR# - System Error, Open Drain Output, Pin 25
SERR# is used for reporting address parity errors and other catastrophic system errors.
INTA# - Host Interrupt A (for SP), Open Drain Output, Pin 81
INTA# is the level triggered interrupt pin dedicated to servicing internal device interrupt
sources.
PCICLK - PCI Bus Clock, Input, Pin 83
PCICLK is the PCI bus clock for timing all PCI transactions. All PCI synchronous signals are
generated and sampled relative to the rising edge of this clock.
RST# - PCI Device Reset, Pin 82
RST# is the PCI bus master reset.
VDD5REF: Clean 5 V Power Supply, Pin 73
VDD5REF is the power connection pin for the 5 V PCI pseudo supply for the PCI bus drivers.
The internal core logic runs on 3.3 Volts. This pin enables the PCI interface to support and be
tolerant of 5 Volt signals. Must be connected to +5 Volts.
PCIVDD[7:0] - PCI Bus Driver Power Supply, Pins 50, 39, 31, 21, 8, 100, 94, 86
PCIVDD pins are the PCI driver power supply pins. These pins must have a nominal
+3.3 Volts.
PCIGND[7:0] - PCI Bus Driver Ground Pins, Pins 49, 40, 30, 22, 7, 1, 93, 87
PCIGND pins are the PCI driver ground reference pins.
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CIRRUS LOGIC PRELIMINARY PRODUCT BULLETIN JUNE 30, 5:03 PM
DS292PP3