CS4392(2002) 查看數據表（PDF） - Cirrus Logic

零件编号

产品描述 (功能)

生产厂家

CS4392
(Rev.:2002)

24-Bit, 192 kHz Stereo DAC with Volume Control

Cirrus Logic 

CS4392

SWITCHING CHARACTERISTICS - SPI CONTROL PORT (Inputs: logic 0 = AGND,

logic 1 = VL)

Parameter

SPI Mode

CCLK Clock Frequency

RST Rising Edge to CS Falling

CCLK Edge to CS Falling

CS High Time Between Transmissions

CS Falling to CCLK Edge

CCLK Low Time

CCLK High Time

CDIN to CCLK Rising Setup Time

CCLK Rising to DATA Hold Time

Rise Time of CCLK and CDIN

Fall Time of CCLK and CDIN

Symbol

Min

fsclk

-

tsrs

500

(Note 7)

tspi

500

tcsh

1.0

tcss

20

tscl

82

tsch

82

tdsu

40

(Note 8)

tdh

15

(Note 9)

tr2

-

(Note 9)

tf2

-

Max

Unit

6

MHz

-

ns

-

ns

-

µs

-

ns

-

ns

-

ns

-

ns

-

ns

100

ns

100

ns

Notes: 7. tspi only needed before first falling edge of CS after RST rising edge. tspi = 0 at all other times.

8. Data must be held for sufficient time to bridge the transition time of CCLK.

9. For FSCK < 1 MHz

RST

t srs

CS

t spi t css

t scl t sch

t csh

CCLK

t r2

t f2

C D IN

t dsu t dh

Figure 39. SPI Control Port Timing

DS459PP2

35

Share Link: