CS4391A-KS 查看數據表（PDF） - Cirrus Logic

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CS4391A-KS

24-Bit, 192 kHz Stereo DAC with Volume Control

Cirrus Logic 

CS4391A

SWITCHING CHARACTERISTICS - PCM MODES (Inputs: Logic 0 = 0 V, Logic 1 = VL)

Parameters

Input Sample Rate

LRCK Duty Cycle

MCLK Duty Cycle

SCLK Frequency

SCLK Frequency

SCLK rising to LRCK edge delay

SCLK rising to LRCK edge setup time

SDATA valid to SCLK rising setup time

SCLK rising to SDATA hold time

Symbol

Min

Fs

4

45

40

-

(Note 6)

-

tslrd

20

tslrs

20

tsdlrs

20

tsdh

20

Typ

Max

Units

-

200

kHz

50

55

%

50

60

%

-

MCLK/2

Hz

-

MCLK/4

Hz

-

-

ns

-

-

ns

-

-

ns

-

-

ns

Notes: 6. This serial clock is available only in Control Port Mode when the MCLK Divide bit is enabled.

LRCK

S C LK

SDATA

t slrd

t sdlrs

t slrs

t sdh

Figure 1. Serial Mode Input Timing

DS600PP3

9

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