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CS4297A_06 查看數據表(PDF) - Cirrus Logic

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CS4297A_06 Datasheet PDF : 52 Pages
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CCSS44229977AA
4.17 AC Mode Control Register (Index 5Eh)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
0
0
0 DDM AMAP 0 SM1 SM0 0
0
0
0
DDM
AMAP
SM[1:0]
Default
DAC Direct Mode. This bit controls the source to the line and alternate line output drivers. When
set, the L/R DACs directly drive the line and alternate line outputs by bypassing the audio mix-
er. When clear, the audio mixer is the source for the line and alternate line outputs.
Audio Slot Mapping. This read/write bit controls whether the CS4297A responds to the Codec
ID based slot mapping as outlined in the AC 97 2.1 specification. The bit is shadowed in the
Extended Audio ID Register (Index 28h). Refer to Table 7 for the slot mapping configurations.
Slot Map. The SM[1:0] bits define the Slot Mapping for the CS4297A when the AMAP bit is
cleared. Refer to Table 7 for the slot mapping configurations.
0080h
Slot
Assignment
Mode
Codec ID Slot Map
AMAP
ID1 ID0 SM1 SM0
4.18
AMAP Mode 0 0 0 X X
1
AMAP Mode 1 0 1 X X
1
AMAP Mode 2 1 0 X X
1
AMAP Mode 3 1 1 X X
1
Slot Map Mode 0 X X 0 0
0
Slot Map Mode 1 X X 0 1
0
Slot Map Mode 2 X X 1 0
0
Slot Map Mode 3 X X 1 1
0
Table 7. Slot Mapping
Misc. Crystal Control Register (Index 60h)
Slot Assignments
DAC,
SPDIF
ADC
LRLR
3434
3434
7878
6969
3434
5656
7878
9 10 9 10
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
Reserved
0
0
Reserved
0
Reserved LOSM
LOSM
Default
Loss of SYNC Mute Enable. The LOSM bit controls the loss of SYNC mute function. If this bit
is set, the CS4297A will mute all analog outputs for the duration of loss of SYNC. If this bit
is cleared, the mixer will continue to function normally during loss of SYNC. The CS4297A
expects to sample SYNC highfor 16 consecutive BIT_CLK periods and then lowfor 240
consecutive BIT_CLK periods, otherwise loss of SYNC becomes true.
0023h
DS318PP6
29
29

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