CS4270 查看數據表（PDF） - Cirrus Logic
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CS4270 Datasheet PDF : 49 Pages
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CS4270
LRCK output
SCLK output
SDOUT
tmslr
MSB
tsdo
MSB-1 MSB-2 MSB-3
Figure 4. Master Mode, Left-Justified SAI
LRCK input
SCLK input
SDOUT
t slrd
t sclkh
tstp thld
MSB
t sclkl
MSB-1
Figure 5. Slave Mode, Left-Justified SAI
LRCK output
SCLK output
SDOUT
tmslr
MSB
LRCK input
tsdo
MSB-1 MSB-2 MSB-3
SCLK input
SDOUT
t slrd
t sclkh
t sclkl
tstp thld
MSB
Figure 6. Master Mode, I²S SAI
Figure 7. Slave Mode, I²S SAI
SCLK
t sclkw
SDIN
t sdis
t sdih
Figure 8. Master and Slave Mode SDIN vrs. SCLK
18
DS686PP1
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