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CS4218 查看數據表(PDF) - Cirrus Logic

零件编号
产品描述 (功能)
生产厂家
CS4218
Cirrus-Logic
Cirrus Logic 
CS4218 Datasheet PDF : 44 Pages
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CS4218
ignored and the sample frequency is linearly
scaled with SCLK. (The CLKIN pin must be
tied low.) This mode also fixes SCLK at 256 bits
per frame with MF7:SFS1 and MF8:SFS2 select-
ing the particular sub-frame. This master
clocking option is not available in the multiplier
(SM3-MS) sub-mode.
Multiplier Sub-Modes (SM3-MM and
SM3-MS)
The SM3 Multiplier sub-modes are identical to
the SM3-M and SM3-S sub-modes with the fol-
lowing exceptions:
Set SMODE1 = SMODE2 = SMODE3 = 0.
This selects SM3 Multiplier mode.
CLKIN must be 16*Fs, as opposed to
256*Fs used for SM3-M and SM3-S.
A 0.47uF capacitor must be connected to the
FILT pin as shown in Figure 8.
Master / Slave setup, frame formats, and sample
rate selection are identical to SM3-M and SM3-
S. Please note that the MF1:F1 = MF2:F2 = 1
slave configuration supported by the SM3-S sub-
mode it not available in SM3-MS sub-mode.
DATA
FRAME n
64 SCLK Periods
FRAME (n+1)
FRAME (n+2)
FRAME (n+3)
Sub-frame 1
Sub-frame 1
Sub-frame 1
Sub-frame 1
Word A Word B Word A Word B Word A Word B Word A Word B
SSYNC
Figure 16. SM3-S and SM3-MS - 64 BPF; MF1:F1, MF2:F2 = 00
MF8: MF7: Sub-
SFS2 SFS1 frame
0
01
DATA
SSYNC
FRAME n
128 SCLK Periods
FRAME (n+1)
FRAME (n+2)
Sub-frame 1
Sub-frame 2
Sub-frame 1
Sub-frame 2
Sub-frame 1
Word A Word B Word A Word B Word A Word B Word A Word B Word A Word B
MF8: MF7: Sub-
SFS2 SFS1 frame
0
01
0
12
Figure 17. SM3-S and SM3-MS - 128 BPF; MF1:F1, MF2:F2 = 01
DATA
FRAME n
256 SCLK Periods
FRAME (n+1)
Sub-frame 1
Sub-frame 2
Sub-frame 3
Word A Word B Word A Word B Word A Word B
Sub-frame 4
Sub-frame 1
Word A Word B Word A Word B
SSYNC
Figure 18. SM3-S and SM3-MS - 256 BPF; MF1:F1, MF2:F2 = 10
MF8: MF7: Sub-
SFS2 SFS1 frame
0
01
0
12
1
03
1
14
DS135F1
21

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