CS5345-DQZR 查看數據表（PDF） - Cirrus Logic
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CS5345-DQZR Datasheet PDF : 41 Pages
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CS5345
4.4 Analog Input Multiplexer, PGA, and Mic Gain
The CS5345 contains a stereo 6-to-1 analog input multiplexer followed by a programmable gain amplifier
(PGA). The input multiplexer can select one of six possible stereo analog input sources and route it to the
PGA. Analog inputs 4A and 4B are able to insert a +32 dB gain stage before the input multiplexer, allowing
them to be used for microphone-level signals without the need for any external gain. The PGA stage pro-
vides ±12 dB of gain or attenuation in 0.5 dB steps. Figure 9 shows the architecture of the input multiplexer,
PGA, and microphone gain stages.
AIN1A
AIN2A
AIN3A
AIN4A/MICIN1
AIN5A
AIN6A
AIN1B
AIN2B
AIN3B
AIN4B/MICIN2
AIN5B
AIN6B
+32 dB
+32 dB
MUX
PGA
Channel A
PGA Gain Bits
Analog Input
Selection Bits
Channel B
PGA Gain Bits
MUX
PGA
Out to ADC
Channel A
Out to ADC
Channel B
Figure 9. Analog Input Architecture
The ““Analog Input Selection (Bits 2:0)” on page 35” outlines the bit settings necessary to control the input
multiplexer and mic gain. “Channel B PGA Control - Address 07h” on page 33 and “Channel A PGA Control
- Address 08h” on page 34 outline the register settings necessary to control the PGA. By default, line-
level input 1 is selected, and the PGA is set to 0 dB.
4.5 Input Connections
The analog modulator samples the input at 6.144 MHz (MCLK=12.288 MHz). The digital filter will reject sig-
nals within the stopband of the filter. However, there is no rejection for input signals which are
(n × 6.144 MHz) the digital passband frequency, where n=0,1,2,... Refer to the Typical Connection Diagram
for the recommended analog input circuit that will attenuate noise energy at 6.144 MHz. The use of capac-
itors which have a large voltage coefficient (such as general-purpose ceramics) must be avoided since
these can degrade signal linearity. Any unused analog input pairs should be left unconnected.
4.6 PGA Auxiliary Analog Output
The CS5345 includes an auxiliary analog output through the PGAOUT pins. These pins can be configured
to output the analog input to the ADC as selected by the input MUX and gained or attenuated with the PGA,
or alternatively, they may be set to high-impedance. See the ““PGAOut Source Select (Bit 6)” on page 33”
for information on configuring the PGA auxiliary analog output.
The PGA auxiliary analog output can source very little current. As current from the PGAOUT pins increases,
distortion will increase. For this reason, a high-input impedance buffer must be used on the PGAOUT pins
to achieve full performance. Refer to the table in “PGAOUT Analog Characteristics” on page 12 for accept-
able loading conditions.
DS658F2
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