CS42L51 查看數據表（PDF） - Cirrus Logic
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CS42L51 Datasheet PDF : 88 Pages
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POWER CONSUMPTION
See (Note 25)
Power Ctl. Registers
02h
03h
CS42L51
Typical Current (mA)
Operation
iVA_HP
iVA
V
1 Off (Note 26)
x x x x x x x x x x 1.8 0
0
2.5 0
0
2 Standby (Note 27)
x x x x x x 1 x x x 1.8 0
0.01
2.5 0
0.01
3 Mono Record
ADC 1 1 1 1 1 0 0 1 1 1 1.8 0
1.85
2.5 0
2.07
PGA to ADC 1 1 1 0 1 0 0 1 1 1 1.8 0
2.35
2.5 0
2.58
MIC to PGA to ADC 1 1 1 0 1 0 0 1 0 0 1.8 0
3.67
(with Bias)
2.5 0
3.95
MIC to PGA to ADC 1 1 1 0 1 0 0 1 0 1 1.8 0
3.27
(no Bias)
2.5 0
3.52
4 Stereo Record
ADC 1 1 1 1 0 0 0 1 1 1 1.8 0
2.69
2.5 0
2.93
PGA to ADC 1 1 0 0 0 0 0 1 1 1 1.8 0
3.65
2.5 0
3.91
MIC to PGA to ADC 1 1 0 0 0 0 0 0 0 1 1.8 0
5.48
(no Bias)
2.5 0
5.76
5 Mono Playback
1 0 1 1 1 1 0 1 1 1 1.8 1.66 1.40
2.5 2.03 1.71
6 Stereo Playback
0 0 1 1 1 1 0 1 1 1 1.8 2.77 2.05
2.5 3.21 2.50
7
Mono Record & Playback
PGA in (no MIC) to Mono Out
1 0 1 0 1 0 0 1 1 1 1.8 1.66 3.63
2.5 2.03 4.16
8
Phone Monitor
MIC (w/bias) in to Mono Out
1 0 1 0 1 0 0 1 0 0 1.8 1.66 4.95
2.5 2.03 5.52
9
Stereo Record & Playback
PGA in (no MIC) to Stereo Out
0 0 0 0 0 0 0 1 1 1 1.8 2.77
2.5 3.21
5.59
6.28
iVD
iVL
(Note 28)
Total
Power
(mWrms)
0
0
0
0
0
0
0.02
0
0.05
0.03
0
0.10
2.03
0.03
7.05
3.05
0.05
12.94
2.03
0.03
7.95
3.08
0.05
14.29
2.05
0.03
10.36
3.09
0.05
17.71
2.03
0.03
9.61
3.08
0.05
16.62
2.12
0.03
8.72
3.18
0.04
15.40
2.12
0.03
10.45
3.17
0.04
17.84
2.11
0.03
13.73
3.17
0.04
22.45
2.35
0.01
9.74
3.48
0.02
18.08
2.35
0.01
12.93
3.49
0.02
23.02
2.73
0.03
14.49
4.08
0.05
25.79
2.75
0.03
16.90
4.08
0.05
29.20
2.82
0.03
20.18
4.19
0.04
34.30
25. Unless otherwise noted, test conditions are as follows: All zeros input, slave mode, sample rate =
48 kHz; No load. Digital (VD) and logic (VL) supply current will vary depending on speed mode and mas-
ter/slave operation.
26. RESET pin 25 held LO, all clocks and data lines are held LO.
27. RESET pin 25 held HI, all clocks and data lines are held HI.
28. VL current will slightly increase in master mode.
DS679F1
25
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