CS42L51(2005) 查看數據表（PDF） - Cirrus Logic

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CS42L51
(Rev.:2005)

Low Power, Stereo CODEC with Headphone Amp

Cirrus Logic 

CS42L51

Limiter RELEASE Rate (RRATE[5:0])

Default: 111111

Binary Code

000000

···

111111

Release Time

Fastest Release

···

Slowest Release

Function:

Sets the rate at which the limiter releases the digital attenuation from levels below the minimum setting in

the limiter threshold register, and returns the analog output level to the AOUTx_VOL[7:0] setting.

The limiter release rate is user selectable but is also a function of the sampling frequency, Fs, and the

DAC_SZC setting unless the disable bit is enabled.

6.22 Limiter Attack Rate Register (Address 1Bh)

7

Reserved

6

Reserved

5

ARATE5

4

ARATE4

3

ARATE3

2

ARATE2

1

ARATE1

0

ARATE0

NOTE: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.

Limiter Attack Rate (ARATE[5:0])

Default: 000000

Binary Code

000000

···

111111

Attack Time

Fastest Attack

···

Slowest Attack

Function:

Sets the rate at which the limiter attenuates the analog output from levels above the maximum setting in the

limiter threshold register.

The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and the

DAC_SZC setting unless the disable bit is enabled.

6.23 ALC Enable & Attack Rate (Address 1Ch)

7

ALC_ENB

6

5

4

3

2

1

0

ALC_ENA ALC_ARATE5 ALC_ARATE4 ALC_ARATE3 ALC_ARATE2 ALC_ARATE1 ALC_ARATE0

ALC Enable (ALC_ENX)

Default: 0

0 - Disabled

1 - Enabled

Function:

Enables automatic level control for ADC channel x.

Note: When the ALC is enabled, the Attenuator and PGA volume is automatically controlled and should

not be adjusted manually.

DS679A2

67

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