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CS42L51(2005) 查看數據表(PDF) - Cirrus Logic

零件编号
产品描述 (功能)
生产厂家
CS42L51
(Rev.:2005)
Cirrus-Logic
Cirrus Logic 
CS42L51 Datasheet PDF : 83 Pages
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CS42L51
The MICBIAS series resistor must be selected based on the requirements of the particular microphone
used. The MICBIAS output pin is selected using the MICBIAS_SEL bit.
Software
Controls:
“Interface Control (Address 04h)” on page 49, “MIC Control (Address 05h)” on page 51.
MICBIAS
20
//
+ MICIN1
17
Σ
//
+ MICIN2
18
Figure 10. MIC Input Mix w/Common Mode Rejection
2.5 V
2.15 V
1.25 V
0.35 V
2.15 V
1.25 V
0.35 V
VA
AINxA
AINxB
Full-Scale Differential Input Level (MICMIX=1)
= (AINxA - AINxB) = 3.6 VPP = 1.27 VRMS
Figure 11. Differential Input
4.3.5
Analog Input Multiplexer
A stereo 4-to-1 analog input multiplexer selects between a line-level input source, or a mic-level input
source, depending on the PDN_PGAx and AINx_MUX[1:0] bit settings. Signals may be routed to or by-
passed around the PGA. To conserve power, the PGA’s may be powered down allowing the user to select
from multiple line-level sources and route the stereo signal directly to the ADC. When using the MIC pre-
amp, however, the PGA must be powered up.
Analog input channel B may also be used as an output for the MIC bias voltage. The MICBIAS_SEL bit
routes the bias voltage to either of two pins. The multiplexer must then select from the remainder of the
two input channels.
The ADC, PGA and MIC pre-amplifier each has an associated input resistance. When selecting between
these paths, the input resistance to the CODEC will change accordingly. Refer to the input resistance
characteristics in the Characteristic and Specification Tables for the input resistance of each path.
Software
Controls:
“Power Control 1 (Address 02h)” on page 47, “MIC Control (Address 05h)” on page 51, “ADCx
Input Select, Invert & Mute (Address 07h)” on page 53.
30
DS679A2

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