CAT28C16API-90T 查看數據表（PDF） - Catalyst Semiconductor => Onsemi

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CAT28C16API-90T

16K-Bit CMOS PARALLEL E2PROM

Catalyst Semiconductor => Onsemi 

CAT28C16A

DEVICE OPERATION

Read

Data stored in the CAT28C16A is transferred to the data

bus when WE is held high, and both OE and CE are held

Figure 3. Read Cycle

ADDRESS

CE

OE

WE

DATA OUT

tRC

tCE

tOE

VIH

tLZ

HIGH-Z

tOLZ

low. The data bus is set to a high impedance state when

either CE or OE goes high. This 2-line control architec-

ture can be used to eliminate bus contention in a system

environment.

tOH

DATA VALID

tAA

tOHZ

tHZ

DATA VALID

Figure 4. Byte Write Cycle [WE Controlled]

ADDRESS

CE

tAS

tAH

tCS

tWC

tCH

OE

WE

DATA OUT

DATA IN

tOES

tWP

HIGH-Z

tOEH

tDL

DATA VALID

tDS

tDH

Doc. No. 1076, Rev. D

6

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