C8051F93X-C8051F92X 查看數據表（PDF） - Silicon Laboratories

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C8051F93X-C8051F92X

Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU

Silicon Laboratories 

C8051F93x-C8051F92x

5.5. ADC0 Analog Multiplexer

ADC0 on C8051F93x-C8051F92x has an analog multiplexer, referred to as AMUX0.

AMUX0 selects the positive inputs to the single-ended ADC0. Any of the following may be selected as the

positive input: Port I/O pins, the on-chip temperature sensor, the VBAT Power Supply, Regulated Digital

Supply Voltage (Output of VREG0), VDD/DC+ Supply, or the positive input may be connected to GND. The

ADC0 input channels are selected in the ADC0MX register described in SFR Definition 5.12.

ADC0MX

P0.0

P2.6*

Temp

Sensor

VBAT

Digital Supply

VDD/DC+

AMUX

Programmable

Attenuator

AIN+ ADC0

Gain = 0.5 or 1

*P1.7-P2.6 only available as

inputs on 32-pin packages

Figure 5.7. ADC0 Multiplexer Block Diagram

Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be

configured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for

analog input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT =

0 and Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register

PnSKIP. See Section “21. Port Input/Output” on page 216 for more Port I/O configuration details.

84

Rev. 1.3

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