C8051F93X-C8051F92X 查看數據表（PDF） - Silicon Laboratories

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C8051F93X-C8051F92X

Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU

Silicon Laboratories 

C8051F93x-C8051F92x

26.5. Register Descriptions for PCA0

Following are detailed descriptions of the special function registers related to the operation of the PCA.

SFR Definition 26.1. PCA0CN: PCA Control

Bit

7

6

5

4

3

2

1

0

Name

CF

CR

CCF5

CCF4

CCF3

CCF2

CCF1

CCF0

Type R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

0

0

0

0

0

0

0

0

SFR Page = 0x0; SFR Address = 0xD8; Bit-Addressable

Bit Name

Function

7

CF PCA Counter/Timer Overflow Flag.

Set by hardware when the PCA Counter/Timer overflows from 0xFFFF to 0x0000.

When the Counter/Timer Overflow (CF) interrupt is enabled, setting this bit causes the

CPU to vector to the PCA interrupt service routine. This bit is not automatically cleared

by hardware and must be cleared by software.

6

CR PCA Counter/Timer Run Control.

This bit enables/disables the PCA Counter/Timer.

0: PCA Counter/Timer disabled.

1: PCA Counter/Timer enabled.

5:0 CCF[5:0] PCA Module n Capture/Compare Flag.

These bits are set by hardware when a match or capture occurs in the associated PCA

Module n. When the CCFn interrupt is enabled, setting this bit causes the CPU to

vector to the PCA interrupt service routine. This bit is not automatically cleared by

hardware and must be cleared by software.

318

Rev. 1.3

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