C8051F93X-C8051F92X 查看數據表（PDF） - Silicon Laboratories

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C8051F93X-C8051F92X

Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU

Silicon Laboratories 

C8051F93x-C8051F92x

SFR Definition 21.3. XBR2: Port I/O Crossbar Register 2

Bit

7

6

5

4

3

2

1

0

Name WEAKPUD XBARE

Type

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset

0

0

0

0

0

0

0

0

SFR Page = 0x0; SFR Address = 0xE3

Bit

Name

Function

7

WEAKPUD

Port I/O Weak Pullup Disable

0: Weak Pullups enabled (except for Port I/O pins configured for analog mode).

6

XBARE Crossbar Enable

0: Crossbar disabled.

1: Crossbar enabled.

5:0

Unused Unused.

Read = 000000b; Write = Don’t Care.

Note: The Crossbar must be enabled (XBARE = 1) to use any Port pin as a digital output.

226

Rev. 1.3

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