C8051F91X-C8051F90X 查看數據表（PDF） - Silicon Laboratories
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C8051F91X-C8051F90X Datasheet PDF : 318 Pages
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C8051F91x-C8051F90x
10.2. Special Function Registers
The special function register used for configuring XRAM access is EMI0CN.
SFR Definition 10.1. EMI0CN: External Memory Interface Control
Bit
7
6
5
4
3
2
1
0
Name
PGSEL
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address = 0xAA
Bit Name
Function
7:1 Unused Unused.
Read = 0000000b; Write = Don’t Care
0 PGSEL XRAM Page Select.
The EMI0CN register provides the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page
of RAM. Since the upper (unused) bits of the register are always zero, the PGSEL
determines which page of XRAM is accessed.
For Example:
If EMI0CN = 0x01, addresses 0x0100 through 0x01FF will be accessed.
If EMI0CN = 0x00, addresses 0x0000 through 0x00FF will be accessed.
112
Rev. 1.0
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