C8051T603-GS(2007) 查看數據表（PDF） - Silicon Laboratories

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C8051T603-GS
(Rev.:2007)

Mixed Signal OTP EPROM MCU Family

Silicon Laboratories 

C8051T600/1/2/3/4/5

SFR Definition 7.3. CPT0MD: Comparator0 Mode Selection

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

—

—

—

—

—

— CP0MD1 CP0MD0 00000010

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0 SFR Address:

0x9D

Bits7–2: UNUSED. Read = 000000b, Write = don’t care.

Bits1–0: CP0MD1–CP0MD0: Comparator0 Mode Select.

These bits select the response time and power consumption for Comparator0.

Mode CP0MD1 CP0MD0

0

0

0

CP0 Response Time / Power Setting*

Fastest Response Time

1

0

1

—

2

1

0

—

3

1

1

Lowest Power Consumption

*Note: See Table 7.1 for response time and power consumption values.

Rev. 0.5

51

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