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C8051F38C-GMR 查看數據表(PDF) - Silicon Laboratories

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产品描述 (功能)
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C8051F38C-GMR
Silabs
Silicon Laboratories 
C8051F38C-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
SCK
(CKPOL=0, CKPHA=1)
SCK
(CKPOL=1, CKPHA=1)
MOSI
MSB
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MISO
MSB
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
NSS (4-Wire Mode)
Figure 25.7. Slave Mode Data/Clock Timing (CKPHA = 1)
25.6. SPI Special Function Registers
SPI0 is accessed and controlled through four special function registers in the system controller: SPI0CN
Control Register, SPI0DAT Data Register, SPI0CFG Configuration Register, and SPI0CKR Clock Rate
Register. The four special function registers related to the operation of the SPI0 Bus are described in the
following figures.
256
Rev. 1.4

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