C8051F364 查看數據表（PDF） - Silicon Laboratories

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C8051F364

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F360/1/2/3/4/5/6/7/8/9

SFR Definition 10.2. IP: Interrupt Priority

SFR Page: all pages

SFR Address: 0xB8

R

R/W

–

PSPI0

Bit7

Bit6

(bit addressable)

R/W

PT2

Bit5

R/W

PS0

Bit4

R/W

PT1

Bit3

R/W

PX1

Bit2

R/W

PT0

Bit1

Bit 7:

Bit 6:

Bit 5:

Bit 4:

Bit 3:

Bit 2:

Bit 1:

Bit 0:

UNUSED. Read = 1b, Write = don't care.

PSPI0: Serial Peripheral Interface (SPI0) Interrupt Priority Control.

This bit sets the priority of the SPI0 interrupt.

0: SPI0 interrupt set to low priority level.

1: SPI0 interrupt set to high priority level.

PT2: Timer 2 Interrupt Priority Control.

This bit sets the priority of the Timer 2 interrupt.

0: Timer 2 interrupt set to low priority level.

1: Timer 2 interrupt set to high priority level.

PS0: UART0 Interrupt Priority Control.

This bit sets the priority of the UART0 interrupt.

0: UART0 interrupt set to low priority level.

1: UART0 interrupt set to high priority level.

PT1: Timer 1 Interrupt Priority Control.

This bit sets the priority of the Timer 1 interrupt.

0: Timer 1 interrupt set to low priority level.

1: Timer 1 interrupt set to high priority level.

PX1: External Interrupt 1 Priority Control.

This bit sets the priority of the External Interrupt 1 interrupt.

0: External Interrupt 1 set to low priority level.

1: External Interrupt 1 set to high priority level.

PT0: Timer 0 Interrupt Priority Control.

This bit sets the priority of the Timer 0 interrupt.

0: Timer 0 interrupt set to low priority level.

1: Timer 0 interrupt set to high priority level.

PX0: External Interrupt 0 Priority Control.

This bit sets the priority of the External Interrupt 0 interrupt.

0: External Interrupt 0 set to low priority level.

1: External Interrupt 0 set to high priority level.

R/W

PX0

Bit0

Reset Value

10000000

Rev. 1.0

111

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