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PIC18LF2523-I/SO 查看數據表(PDF) - Microchip Technology

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PIC18LF2523-I/SO Datasheet PDF : 54 Pages
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PIC18F2423/2523/4423/4523
The value in the ADRESH:ADRESL registers is
unknown following POR and BOR Resets and is not
affected by any other Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine acquisition time, see Section 2.1 “A/D
Acquisition Requirements”.
After this acquisition time has elapsed, the A/D conver-
sion can be started. An acquisition time can be
programmed to occur between setting the GO/DONE
bit and the actual start of the conversion.
The following steps should be followed to perform an A/D
conversion:
1. Configure the A/D module:
• Configure analog pins, voltage reference and
digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on the A/D module (ADCON0)
2. Configure the A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3. Wait the required acquisition time (if required).
4. Start conversion by setting the GO/DONE bit
(ADCON0<1>).
5. Wait for the A/D conversion to complete by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
6. Read the A/D Result registers (ADRESH:ADRESL)
and clear the ADIF bit, if required.
7. For the next conversion, go to step 1 or step 2,
as required.
The A/D conversion time per bit is defined as
TAD. A minimum wait of 2 TAD is required before
the next acquisition starts.
FIGURE 2-2:
A/D TRANSFER FUNCTION
FFFh
FFEh
003h
002h
001h
000h
Analog Input Voltage
FIGURE 2-3:
ANALOG INPUT MODEL
VDD
Rs ANx
VT = 0.6V
RIC 1k
Sampling
Switch
SS RSS
VAIN
CPIN
5 pF
VT = 0.6V
ILEAKAGE
±100 nA
CHOLD = 25 pF
VSS
Legend: CPIN
= Input Capacitance
VT
= Threshold Voltage
ILEAKAGE = Leakage Current at the pin due to
various junctions
RIC
= Interconnect Resistance
SS
= Sampling Switch
CHOLD = Sample/Hold Capacitance (from DAC)
RSS
= Sampling Switch Resistance
6V
5V
VDD 4V
3V
2V
1 23 4
Sampling Switch (kΩ)
© 2009 Microchip Technology Inc.
DS39755C-page 29

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