UT1553B/BCRTMP-GCX 查看數據表（PDF） - Aeroflex UTMC

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UT1553B/BCRTMP-GCX

Bus Controller Remote Terminal Multi-Protocol (BCRTMP)

Aeroflex UTMC 

#14 Activity Status/Operational Mode Register

Bit

Number

Description

BITs 15-14

BIT 13

BIT 12

BIT 11

BIT 10

BIT 9

BIT 8

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Reserved.

Ignore T/R bit in Mode Command. When high, this bit causes the BCRTMP to ignore the value of the T/R bit in

1553 Mode Commands 0-15 (mode codes without data) and prevents automatic execution of modes 18-19. This

feature is used in conjunction with Operational Mode 6 (input pin MD6).

Stop Enable. When the BCRTMP is in the RT mode, this bit enables a feature that places the BCRTMP into the

Forced Busy Mode when an interrupt (either Standard or High-Priority) occurs. When the BCRTMP enters the

Forced Busy Mode, the device responds with the Busy bitset in the 1553 status word any time a valid 1553

command is received. When the interrupt iscleared, the BCRTMP exits the Forced Busy Mode.

For BC operation, setting the Stop Enable bit causes the BCRTMP to halt Command Block execution when an

enabled interrupt (either Standard or High-Priority) occurs. Command Block execution resumes when the user

clears the interrupt by writing a “1” to the appropriate bit in Register 8.

Bus B Active. This bit goes high when the BCRTMP, acting as a Remote Terminal, receives a valid 1553 command

on the secondary bus.

Bus A Active. This bit goes high when the BCRTMP, acting as a Remote Terminal, receives a valid 1553 command

on the primary bus.

WRAPF Wrap-Around Test Fail. This bit reflects the state of the WRAPF output signal.

ALTWRAP Alternate Channel Wrap-Around Test Enable. After Master Reset, this bit reflects the complement of

the state of the ALTWRAP input signal. This bit can be software-modified if the LOCK pin is low. Thus, to enable

the ALTWRAP feature, write a one to this bit location.

WRAPEN Wrap-Around Test Enable. After Master Reset, this bit reflects the complement of the state of the

WRAPEN input signal. This bit can be software-modified if the LOCK pin is low. Thus, to enable the WRAPEN

feature, write a one to this bit location.

MD6 Operational Mode 6. After Master Reset, this bit reflects the state of the corresponding input pin (MD6).

See section 8.1.7 for a summary of Operational Mode 6. This bit can be software-modified if the LOCK pin is low.

MD5 Operational Mode 5. After Master Reset, this bit reflects the state of the corresponding input pin (MD5).

See section 8.1.6 for a summary of Operational Mode 5. This bit canbe software-modified if the LOCK pin

is low.

MD4 Operational Mode 4. After Master Reset, this bit reflects the state of the corresponding input pin (MD4).

See section 8.1.5 for a summary of Operational Mode 4. This bit canbe software-modified if the LOCK pin

is low.

MD3 Operational Mode 3. After Master Reset, this bit reflects the state of the corresponding input pin (MD3).

See section 8.1.4 for a summary of Operational Mode 3. This bit canbe software-modified if the LOCK pin

is low.

MD2 Operational Mode 2. After Master Reset, this bit reflects the state of the corresponding input pin (MD2).

See section 8.1.3 for a summary of Operational Mode 2. This bit can be software-modified if the LOCK pin is low.

MD1 Operational Mode 1. After Master Reset, this bit reflects the state of the corresponding input pin (MD1).

See section 8.1.2 for a summary of Operational Mode . This bit can be software-modified if the LOCK pin is low.

MD0 Operational Mode 0. After Master Reset, this bit reflects the state of the corresponding input pin (MD0).

See section 8.1.1 for a summary of Operational Mode 0. This bit canbe software-modified if the LOCK pin

is low.

BCRTMP-22

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