CL-PS7500FE 查看數據表（PDF） - Cirrus Logic

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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

10.3.38 MSECR (0xAC) — Mouse Control

As KBDCR register.

10.3.39 IOTCR (0xC4) — I/O Timing Control

76543210

XXXXCCSS

This register sets up the cycle types for two areas of I/O space.

C

combo area access speed

S

NPCCS 1/2 area access speed

Write

bits[7:4] reserved

bits[3:2]

00

01

10

11

Type A (slowest)

Type B

Type C

Type D (fastest)

bits[1:0]

00

01

10

11

Type A (slowest)

Type B

Type C

Type D (fastest)

Read

read back the above values

10.3.40 ECTCR (0xC8) — I/O Expansion Card Timing Control

76543210

EEEEEEEE

This register sets up the access speed for eight portions of extended address space within the area of I/O

space from 08FFFFFF to 0FFFFFFF. (Types A and C only.)

E

expansion card area access speed

Write

bit[7] (0F00 0000..0FFF FFFF)

0

Type A

1

Type C

bit[0] (0800 0000..08FF FFFF)

0

Type A

1

Type C

Read

read back above values

June 1997

ADVANCE DATA BOOK v2.0

95

MEMORY AND I/O PROGRAMMERS’ MODEL

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