CS4227 查看數據表（PDF） - Cirrus Logic

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CS4227

Six Channel, 20-Bit Codec

Cirrus Logic 

CS4227

2.13 Memory Address Pointer (MAP)

7

6

INCR

0

5

4

3

2

1

0

MAP4

MAP3

MAP2

MAP1

MAP4-MAP0

Register Pointer

INCR

Auto Increment Control Bit

0 - No auto increment

1 - Auto increment on

This register defaults to 01h.

2.14 Reserved Byte (0)

2.15

This byte is reserved for internal use and must be set to 00h for normal operation.

This register defaults to 00h.

Clock Mode Byte (1)

7

6

5

4

3

2

1

0

CO1

CO0

CI1

CI0

0

0

CE

CI1-CI0

CO1-CO0

Master clock enable

0 - Clock Enabled

1 - Clock Disabled

Determines frequency of XTI

0 - 256 Fs

1 - 384 Fs

2 - 512 Fs

3 - not used

Sets CLKOUT frequency

0 - 256 Fs

1 - 384 Fs

2 - 512 Fs

3 - 1 Fs

This register defaults to 01h.

0

MAP0

0

CE

22

DS281PP2

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