EVAL-ADUCM410QSPZ(Rev0) Просмотр технического описания (PDF) - Analog Devices
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производитель
EVAL-ADUCM410QSPZ
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
EVAL-ADUCM410QSPZ Datasheet PDF : 35 Pages
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Data Sheet
Parameter
Min
Output Voltage Range
250
500
Allowed External Load Capacitance1
TIA Gain Resistors
250 Ω, 750 Ω
2 kΩ, 5 kΩ, 10 kΩ, 20 kΩ, 100 kΩ
Gain Accuracy
−5
Gain Drift over Temperature
Gain Mismatch Error
−0.8
ON-CHIP VOLTAGE REFERENCE
Output Voltage
Accuracy
Reference Temperature Coefficient
Power Supply Rejection Ratio (PSRR)
DC
AC
Output Impedance
EXTERNAL REFERENCE INPUT
Input Voltage Range
Input Impedance
BUFFERED REFERENCE VOLTAGE
OUTPUTS (BUFx_VREF)
Output Voltage
Accuracy
Reference Temperature Coefficient
Load Regulation
Output Impedance
Load Current
PSRR
VOLTAGE DAC (VDAC) CHANNEL
SPECIFICATIONS
DC Accuracy
Resolution
Relative Accuracy3
Differential Nonlinearity3
Calculated Offset Error
Actual Offset Error
12
−2
−0.9
−13.5
−10
−10
Typ
Max
Unit
Lower of
mV
2500 or
AVDD − 800
1800
mV
120
30
+5
+12
60
120
±0.3
+0.9
2.5
±5
10
30
10
20
70
60
2
2.5
5
1.25 or
2.5
±6
10
30
10
20
2.5
2.5
4
70
pF
pF
%
ppm/°C
%
V
mV
ppm/°C
ppm/°C
dB
dB
Ω
V
kΩ
V
mV
ppm/°C
ppm/°C
mV/mA
Ω
mA
dB
Bits
±1.5
+3
LSB
±0.5
+0.9
LSB
±5
+15.5
mV
+2
+10
mV
+2
+10
mV
Rev. 0 | Page 7 of 35
ADuCM410
Test Conditions/Comments
Except RTIA = 250 Ω
RTIA = 250 Ω
No external extra capacitors to AGND or
to supply on AINx when used as TIA
inputs
TIA gain resistor and ADC gain error
Error introduced when moving up or
down one RTIA value
4.7 μF decoupling capacitor between
ADCREFP and ADCREFN
TA = 25°C
TA = −40°C to +25°C range
TA = 25°C to 105°C range
AVDD change effects, 2.85 V to 3.6 V
Tested with AVDD noise of 1 kHz, 10 kHz,
100 kHz, and 1 MHz
Do not use as external reference source,
TA = 25°C
Only supports 2.5 V external reference
input
External reference source must be
capable of sourcing 500 µA minimum
1 μF capacitor required on both outputs
TA = 25°C, load = 4 mA
TA = −40°C to +25°C range
TA = 25°C to 105°C range
VDAC Channel 0 to Channel 7: buffer on;
load resistance (RL) = 1 kΩ, load
capacitance (CL) = 100 pF; DACCONx, Bit 9
= 0 (normal drive, unless otherwise
stated); VDAC Channel 8 to Channel 11:
buffer on, RL = 2.5 kΩ, CL = 100 pF
Guaranteed monotonic
2.5 V internal reference
Measured at Code 0
VDAC Channel 0 to Channel 7: DACCONx,
Bit 9 = 1; RL = 250 Ω; CL = 100 pF
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