CS9236-CQ Просмотр технического описания (PDF) - Cirrus Logic

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CS9236-CQ

Single-Chip Wavetable Music Synthesizer

Cirrus Logic 

CS9236

MIDI_IN - Serial MIDI Data Input, PIN 20 (L), PIN 28 (Q).

Serial MIDI data input to the device. This data stream contains MIDI messages which are used

to control music synthesis and initiation/termination of the Test Tone.

SOUT - Serial Audio Data Output, PIN 11 (L), PIN 8 (Q).

Serial data output stream carrying the stereo digital audio output from the device. The digital

audio output sample rate is 44.1 ksample/s, stereo.

LRCLK - Serial Audio Data Left/Right Clock Output, PIN 10 (L), PIN 7 (Q).

This is the left/right word clock output associated with the serial data output, SOUT. The

LRCLK signal identifies word alignment of the SOUT data stream.

RST - Reset Input, PIN 24 (L), PIN 32 (Q).

This active-low input signal is used to initialize all of the devices internal states and registers to

a known default state. The RST signal will silence the digital audio output.

PDN - Power-Down Input, PIN 23 (L), PIN 31 (Q).

This active-low input signal is used to set the device to the low power consumption Power-

Down mode of operation. The Power-Down mode is fully static; all internal states and register

values are retained during Power-Down. Deassertion of the PDN signal returns the device to

normal operation.

TEST - Factory Test Input, PIN 19 (L), PIN 27 (Q).

Used for factory testing of device. This pin must be tied to digital ground during normal

operation.

MCLK5I - 5 Volt Master Clock Input, PIN 5 (L), PIN 2 (Q).

This is the master clock input for the device. The CS9236 internal timing is derived from one

of two possible sources; the part may be supplied a 16.9344 MHz Master Clock signal from an

external source, or the timing may be generated using the on-chip oscillator circuit in

conjunction with an external 16.9344 MHz quartz crystal. When a Master Clock signal is

provided to the CS9236 from an external device, the Master Clock signal should be connected

to the CS9236 MCLK5I input pin and the XTAL3I input pin is grounded. When the CS9236

internal timing is generated using the on-chip oscillator circuit, a 16.9344 MHz quartz crystal is

connected between the CS9236 XTAL3I input pin and the XTALO output pin, and the

MCLK5I input pin is grounded. In this case, the XTALO output may also be used as a 384X

master clock for the CS9236 digital audio output signal, SOUT.

DS214PP11

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