datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
HOME  >>>  Mitel Networks  >>> PDSP16116 PDF

PDSP16116 Datasheet - Mitel Networks

PDSP16116 image

Part Name
PDSP16116

Other PDF
  no available.

PDF
DOWNLOAD     

page
17 Pages

File Size
262.1 kB

MFG CO.
Mitel
Mitel Networks Mitel

The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT applications.
The PDSP16116A variant will multiply two complex (16116) bit words every 50ns and can be configured to output the complete complex (32132) bit result within a single cycle. The data format is fractional two’s complement.

FEATURES
■ Complex Number (16116)3(16116) Multiplication
■ Full 32-bit Result
■ 20MHz Clock Rate
■ Block Floating Point FFT Butterfly Support
■ (21)3(21) Trap
■ Two’s Complement Fractional Arithmetic
■ TTL Compatible I/O
■ Complex Conjugation
■ 2 Cycle Fall Through
■ 144-pin PGA or QFP packages

APPLICATIONS
■ Fast Fourier Transforms
■ Digital Filtering
■ Radar and Sonar Processing
■ Instrumentation
■ Image Processing

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 
 

Part Name
Description
PDF
MFG CO.
16 X 16 Bit Complex Multiplier
Mitel Networks
16 X 12 BIT COMPLEX MULTIPLIER
Zarlink Semiconductor Inc
16 by 16 Bit Complex Multiplier
Zarlink Semiconductor Inc
16 by 16 Bit Complex Multiplier
Zarlink Semiconductor Inc
16 x 16-bit Parallel multiplier
LOGIC Devices Incorporated
16 x 16-bit Multiplier-Accumulator
LOGIC Devices
16 x 16-bit Parallel Multiplier
LOGIC Devices
16 x 16-bit Parallel multiplier
LOGIC Devices
16 x 16-bit Parallel Multiplier
LOGIC Devices Incorporated
16 x 16-Bit CMOS Parallel Multiplier
Intersil

Share Link: GO URL

Korean한국어 Chinese简体中文 Japanese日本語 Russianрусский Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]