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AK8851 Datasheet - Asahi Kasei Microdevices

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Asahi Kasei Microdevices AKM

General Description
The AK8851 is an integrated chip that decodes NTSC, PAL, SECAM composite and S Video signals..
The digital output of the AK8851 is in Y, Cb, Cr signal format which compliances with ITU-R BT.601 and ITU-R BT.656* specifications.
An internally generated pixel clock is synchronized with an input signal. The clock rate is 27 MHz.
When Closed Caption, VBID or WSS information are encoded on input Video signal, they are externally accessible.

• NTSC-M, NTSC-4.43/PAL-B, D, G, H, I, N, Nc, M, 60/SECAM Composite signals and S Video signal decoding function
• On-chip dual 10 Bit ADCs (27 MHz operation)
• Built-in PLLs for input-signal-synchronized clock generation (Line-locked PLL and Frame-locked PLL)
• On-chip Programmable Gain Amp (PGA), ranging from 0 dB to 12 dB
• Auto Color Control (ACC)
• Auto Gain Control (AGC)
• Automatic input signal distinction function
• Adaptive 3-/5-line (NTSC/PAL) YC Separation
• Phase compensation function for PAL signal decoding
• ITU-R BT.656 format output (4:2:2 8 Bit parallel output with EAV / SAV)/ 16-Bit output is also available
• NTSC Closed Caption signal decoding function
• VBID (CGM-A) Program condition decoding function (CRCC decode)
• WSS Program condition decoding function
• VBI slicer function
• Macrovision Certification
• Power down function
• 6 – channel Analog inputs
• I2C Control
• 3.3 V +/- 10 % CMOS
• 100 Pin LQFP package

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