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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
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SL4029B 데이터시트 - System Logic Semiconductor

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SL4029B

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SLS
System Logic Semiconductor 

Presettable Up/Down Counter
High-Voltage Silicon-Gate CMOS

The SL4029B consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consists of a single CLOCK, CARRY IN,(CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as outputs.
Parallel clocking provides synchronous control and hence faster response from all counting outputs. Ripple-clocking allows for longer clock input rise and fall times.

 • Operating Voltage Range: 3.0 to 18 V
 • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
 • Noise margin (over full package temperature range):
    1.0 V min @ 5.0 V supply
    2.0 V min @ 10.0 V supply
    2.5 V min @ 15.0 V supply

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