Intersil
Description
CD4060BMS consists of an oscillator section and 14 ripple carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all O’s state and disables the oscillator. A high level on the RESET line accom plishes the reset function. All counter stages are master slave flip-flops.
FEATUREs
• High Voltage Type (20V Rating)
• Common Reset
• 12MHz Clock Rate at 15V
• Fully Static Operation
• Buffered Inputs and Outputs
• Schmitt Trigger Input Pulse Line
• Standardized, Symmetrical Output Characteristics
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” Oscillator Features
• All Active Components on Chip
• RC or Crystal Oscillator Configuration
• RC Oscillator Frequency of 690kHz Min. at 15V