CS5180-CL 데이터 시트보기 (PDF) - Cirrus Logic

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CS5180-CL

∆Σ Modulator & 8 kHz to 400 kHz 16-Bit ADC

Cirrus Logic 

CS5180

LIST OF FIGURES

Figure 1. Serial Port Timing (not to scale) .................................................................. 7

Figure 2. RESET and SYNC logic and timing. ........................................................... 9

Figure 3. CS5180 connection diagram for using the internal voltage reference. ...... 10

Figure 4. CS5180 connection diagram for using an external voltage reference. ...... 11

Figure 5. Modulator Only Mode Data RTZ Format. .................................................. 12

Figure 6. Circuit to Reconstruct

Return-to-Zero (RTZ) Data from SDO/SDO into Original Modulator Bitstream. 12

Figure 7. Magnitude versus frequency spectrum of modulator

bitstream (MCLK = 25.6 MHz). .......................................................................... 12

Figure 8. Expanded view of the magnitude versus frequency spectrum of

modulator bitstream (MCLK = 25.6 MHz). ......................................................... 12

Figure 9. CS5180 Digital Filter Magnitude Response (MCLK = 25.6 MHz) .............. 13

Figure 10. CS5180 Digital Filter Phase Response

(MCLK = 25.6 MHz) ........................................................................................... 13

Figure 11. CS5180 System Connection Diagram ..................................................... 14

Figure 12. Single amplifier driving only AIN+, AIN- held at steady dc value ............. 21

Figure 13. Performance of amplifier of Figure 12 overdriving AIN+ input to the

CS5180 at 4 VPP ............................................................................................... 21

Figure 14. Performance of amplifier of Figure 12 with AIN+ driven at 2 VPP ........... 21

Figure 15. AC-coupled driver using two amplifiers. .................................................. 22

Figure 16. Performance of amplifier in Figure 15 ..................................................... 22

Figure 17. Three amplifier driver .............................................................................. 23

Figure 18. Performance of amplifier in Figure 17 ..................................................... 23

Figure 19. Four amplifier driver. ............................................................................... 24

Figure 20. Performance of amplifier in Figure 19 ..................................................... 24

Figure 21. Performance of amplifier in Figure 19 ..................................................... 24

Figure 22. CS5180 Differential Non-linearity plot.

(Data taken with repeating ramp) ....................................................................... 25

Figure 23. Histogram of DNL from Figure 22 ........................................................... 25

Figure 24. CS5180 Noise Histogram, > 60,000 samples. ........................................ 25

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