C8051F521-C-IM 데이터 시트보기 (PDF) - Silicon Laboratories

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C8051F521-C-IM

8/4/2 kB ISP Flash MCU Family

Silicon Laboratories 

C8051F52x/F53x

17.3. LIN Master Mode Operation

The master node is responsible for the scheduling of messages and sends the header of each frame, con-

taining the SYNCH BREAK FIELD, SYNCH FIELD and IDENTIFIER FIELD. The steps to schedule a mes-

sage transmission or reception are listed below.

1. Load the 6-bit Identifier into the LIN0ID register.

2. Load the data length into the LIN0SIZE register. Set the value to the number of data bytes or "1111b" if

the data length should be decoded from the identifier. Also, set the checksum type, classic or

enhanced, in the same LIN0SIZE register.

3. Set the data direction by setting the TXRX bit (LIN0CTRL.5). Set the bit to 1 to perform a master

transmit operation, or set the bit to 0 to perform a master receive operation.

4. If performing a master transmit operation, load the data bytes to transmit into the data buffer (LIN0DT1

to LIN0DT8).

5. Set the STREQ bit (LIN0CTRL.0) to start the message transfer. The LIN peripheral will schedule the

message frame and request an interrupt if the message transfer is successfully completed or if an error

has occurred.

This code segment shows the procedure to schedule a message in a transmission operation:

LINADDR

LINDATA

LINADDR

LINDATA

LINADDR

LINDATA

= 0x08;// Point to LIN0CTRL

|= 0x20;// Select to transmit data

= 0x0E;// Point to LIN0ID

= 0x11;// Load the ID, in this example 0x11

= 0x0B;// Point to LIN0SIZE

= ( LINDATA & 0xF0 ) | 0x08; // Load the size with 8

LINADDR = 0x00;// Point to Data buffer first byte

for (i=0; i<8; i++)

{

LINDATA = i + 0x41;// Load the buffer with ‘A’, ‘B’, ...

LINADDR++;// Increment the address to the next buffer

}

LINADDR = 0x08;// Point to LIN0CTRL

LINDATA = 0x01;// Start Request

The application should perform the following steps when an interrupt is requested.

1. Check the DONE bit (LIN0ST.0) and the ERROR bit (LIN0ST.2).

2. If performing a master receive operation and the transfer was successful, read the received data from

the data buffer.

3. If the transfer was not successful, check the error register to determine the kind of error. Further error

handling has to be done by the application.

4. Set the RSTINT (LIN0CTRL.3) and RSTERR bits (LIN0CTRL.2) to reset the interrupt request and the

error flags.

Rev. 1.4

169

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