datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

STM32F301C8Y6TR 데이터 시트보기 (PDF) - STMicroelectronics

부품명
상세내역
제조사
STM32F301C8Y6TR Datasheet PDF : 135 Pages
First Prev 91 92 93 94 95 96 97 98 99 100 Next Last
Symbol
CADC(1)
tCAL(1)
tlatr(1)
Parameter
Internal sample and hold
capacitor
Calibration time
Trigger conversion latency
Regular and injected
channels without conversion
abort
tlatrinj(1)
Trigger conversion latency
Injected channels aborting a
regular conversion
tS(1)
Sampling time
(1) ADC Voltage Regulator
TADCVREG_STUP Start-up time
tSTAB(1)
Power-up time
tCONV(1)
Total conversion time
(including sampling time)
CMIR(1)
Common mode input signal
1. Data guaranteed by design.
Table 64. ADC characteristics (continued)
Conditions
Min
Typ
Max
Unit
-
fADC = 72 MHz
-
CKMODE = 00
CKMODE = 01
CKMODE = 10
CKMODE = 11
CKMODE = 00
CKMODE = 01
CKMODE = 10
CKMODE = 11
fADC = 72 MHz
-
-
-
fADC = 72 MHz
Resolution = 12 bits
Resolution = 12 bits
ADC differential mode
-
5
-
pF
1.5
-
-
-
2.5
-
-
-
0.021
1.5
-
1.56
112
2
-
-
-
3
-
-
-
-
-
-
2.5
2
2.25
2.125
3.5
3
3.25
3.125
8.35
601.5
10
µs
1/fADC
1/fADC
1/fADC
1/fADC
1/fADC
1/fADC
1/fADC
1/fADC
1/fADC
µs
1/fADC
µs
1
conversion
cycle
0.19
-
8.52
µs
14 to 614 (tS for sampling + 12.5 for
successive approximation)
(VSSA + VREF+)/2
- 0.18
(VSSA + VREF+)/2
(VSSA + VREF+)/2
+ 0.18
1/fADC
V

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]