STM32L151V8H6D(2013) 데이터 시트보기 (PDF) - STMicroelectronics

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STM32L151V8H6D
(Rev.:2013)

Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 128KB Flash, 16KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC

STMicroelectronics 

STM32L151x6/8/B, STM32L152x6/8/B

Electrical characteristics

Figure 25. ADC accuracy characteristics

4095

4094

4093

7

6

5

4

3

2

1

[1LSBIDEAL

=VREF+

4096

(or

VDDA depending

4096

on

package)]

EG

(2)

ET

(3)

(1)

EO

EL

ED

1 LSBIDEAL

(1) Example of an actual transfer curve

(2) The ideal transfer curve

(3) End point correlation line

ET=Total Unadjusted Error: maximum deviation

between the actual and the ideal transfer curves.

EO=Offset Error: deviation between the first actual

transition and the first ideal one.

EG=Gain Error: deviation between the last ideal

transition and the last actual one.

ED=Differential Linearity Error: maximum deviation

between actual steps and the ideal one.

EL=Integral Linearity Error: maximum deviation

between any actual transition and the end point

correlation line.

0

1234567

VSSA

4093 4094 4095 4096

VDDA

ai14395b

Figure 26. Typical connection diagram using the ADC

RAIN(1)

AINx

VAIN

C parasitic

VDD

VT

0.6 V

VT

0.6 V

IL± 50 nA

STM32L15xxx

Sample and hold ADC

converter

12-bit

converter

CADC(1)

ai17856c

1. Refer to Table 56: RAIN max for fADC = 16 MHz for the value of RAIN and Table 54: ADC characteristics for

the value of CADC

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy

this, fADC should be reduced.

Doc ID 17659 Rev 8

93/121

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