CS42L52-DNZR 데이터 시트보기 (PDF) - Cirrus Logic
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CS42L52-DNZR Datasheet PDF : 82 Pages
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5/13/08
CS42L52
6.29.4 Limiter Zero Cross Disable
Configures an override of the digital zero-cross setting.
LIMZCDIS
0
1
Application:
Limiter Zero Cross Disable
OFF; Limiter Attack Rate is dictated by the DIGZC (“Digital Zero Cross” on page 53) setting
ON; Limiter volume changes take effect in one step, regardless of the DIGZC setting.
“Limiter” on page 31
6.30 Limiter Control 2, Release Rate (Address 28h)
7
LIMIT
6
5
4
3
LIMIT_ALL LIMRRATE5 LIMRRATE4 LIMRRATE3
2
LIMRRATE2
1
LIMRRATE1
0
LIMRRATE0
6.30.1 Peak Detect and Limiter
Configures the peak-detect and limiter circuitry.
LIMIT
0
1
Application:
Limiter Status
Disabled
Enabled
“Limiter” on page 31
6.30.2 Peak Signal Limit All Channels
Sets how channels are attenuated when the limiter is enabled.
LIMIT_ALL
0
1
Application:
Limiter action:
Apply the necessary attenuation on a specific channel only when the signal amplitude on that specific chan-
nel rises above LMAX.
Remove attenuation on a specific channel only when the signal amplitude on that specific channel falls below
CUSH.
Apply the necessary attenuation on BOTH channels when the signal amplitude on any ONE channel rises
above LMAX.
Remove attenuation on BOTH channels only when the signal amplitude on BOTH channels fall below CUSH.
“Limiter” on page 31
6.30.3 Limiter Release Rate
Sets the rate at which the limiter releases the digital attenuation from levels below the CUSH[2:0] thresh-
old (“Limiter Cushion Threshold” on page 65) and returns the analog output level to the MSTxVOL[7:0]
(“Master Volume Control” on page 63) setting.
LIMRRATE[5:0]
00 0000
···
11 1111
Application:
Release Time
Fastest Release
···
Slowest Release
“Limiter” on page 31
Note: The limiter release rate is user-selectable but is also a function of the sampling frequency, Fs,
and the DIGSFT (“Digital Soft Ramp” on page 53) and DIGZC (“Digital Zero Cross” on page 53) setting.
66
DS680F1
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