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STM32F100VBH7BTR(2010) 데이터 시트보기 (PDF) - STMicroelectronics

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STM32F100VBH7BTR Datasheet PDF : 84 Pages
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Electrical characteristics
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 40 are derived from tests
performed under the ambient temperature, fPCLKx frequency and VDD supply voltage
conditions summarized in Table 8.
Refer to Section 5.3.12: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO).
Table 40. SPI characteristics(1)
Symbol
Parameter
Conditions
Min
Max Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
Slave mode
tr(SCK)
tf(SCK)
SPI clock rise and fall
time
Capacitive load: C = 30 pF
DuCy(SCK)
SPI slave input clock
duty cycle
Slave mode
tsu(NSS)(2)
th(NSS)(2)
tw(SCKH)(2)
tw(SCKL)(2)
NSS setup time
NSS hold time
SCK high and low time
Slave mode
Slave mode
Master mode, fPCLK = 24 MHz,
presc = 4
tsu(MI) (2)
tsu(SI)(2)
Data input setup time
Master mode
Slave mode
th(MI) (2)
th(SI)(2)
ta(SO)(2)(3)
tdis(SO)(2)(4)
tv(SO) (2)(1)
Data input hold time
Data output access time
Data output disable time
Data output valid time
Master mode
Slave mode
Slave mode, fPCLK = 24 MHz
Slave mode
Slave mode (after enable edge)
tv(MO)(2)(1) Data output valid time
Master mode (after enable
edge)
th(SO)(2)
th(MO)(2)
Data output hold time
Slave mode (after enable edge)
Master mode (after enable
edge)
30
4tPCLK
2tPCLK
50
5
5
5
4
0
2
15
2
12
12
8
70
60
3tPCLK
10
25
5
MHz
ns
%
ns
1. Remapped SPI1 characteristics to be determined.
2. Based on characterization, not tested in production.
3. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
the data.
4. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
the data in Hi-Z
Doc ID 16455 Rev 2
63/84

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