CS5460A-BS 데이터 시트보기 (PDF) - Cirrus Logic

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CS5460A-BS

Single Phase, Bi-directional Power/Energy IC

Cirrus Logic 

CS5460A

or custom calibration board. When the metering

system is installed, the calibrator would be used to

control calibration and/or to program user-speci-

fied commands and calibration values into the EE-

PROM. The commands/data will determine the

CS5460A’s exact operation, when the auto-boot

initialization sequence is running. Any of the valid

commands can be used.

3.3.2 Auto-boot Data for EEPROM

This section illustrates what a typical set of code

would look like for an auto-boot sequence. This

code is what would be written into the EEPROM. In

the sequence below, the EEPROM is programmed

so that it will first send out commands that write cal-

ibration values to the calibration registers inside

the CS5460A. This is followed by the commands

used to set (write) the desired Pulse-Rate Register

value, and also to un-mask the ‘LSD’ status bit in

the Mask Register. Finally, the EEPROM code will

initiate ‘continuous computation cycles’ data acqui-

sition mode and select one of the alternate

pulse-output formats (e.g., set the MECH bit in the

Control Register). The serial data for such a se-

quence is shown below in single-byte hexidecimal

notation:

40 00 00 61

;Write to Configuration Regis-

ter, turn high-pass filters on,

set K = 1.

44 7F C4 A9

;Write value of 0x7FC4A9 to

Current Channel Gain Regis-

ter.

46 7F B2 53 ;Write value of 0x7FB253 to

Voltage Channel DC Offset

Register.

4C 00 00 14 ;Set Pulse Rate Register to

0.625 Hz.

74 00 00 04

;Unmask bit #2 (“LSD” bit in

the Mask Register).

E8

;Start performing continuous

computation cycles.

78 00 01 40

;Write STOP bit to Control

Register, to terminate au-

to-boot initialization se-

quence, and also set the

EOUT pulse output to Me-

chanical Counter Format.

This data from the EEPROM will drive the SDI pin

of the CS5460A during the auto-boot sequence.

The following sequence of events will cause the

CS5460A to execute the auto-boot mode initializa-

tion sequence: (A simple timing diagram for this se-

quence is shown below in Figure 14.) If the MODE

pin is set to logic high (or if the MODE pin was

set/tied to logic high during/after the CS5460A has

been powered on), then changing the RESET pin

from active state to inactive state (low to high) will

cause the CS5460A to drive the CS pin low, and af-

ter this, to issue the standard EEPROM block-read

command on the CS5460A’s SDO line. Once these

events have completed, the CS5460A will continue

to issue SCLK pulses, to accept data/commands

from the EEPROM. The serial port will become a

master-mode interface. For a more detailed timing

diagram, see Switching Characteristics (in Section

1.)

MODE

RES

CS

SCLK

SDO

SDI

EE Read

Address 0

5460A

Commands

Figure 14. Timing Diagram for Auto-boot Sequence

Stop

DS487F4

25

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