CS43L41 데이터 시트보기 (PDF) - Cirrus Logic

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CS43L41

Low Power 24-Bit, 96 kHz DAC with Volume Control

Cirrus Logic 

CS43L41

LRCK

SCLK

SDATA

Left Channel

MSB -1 -2 -3 -4 -5 +5 +4 +3 +2 +1 LSB

Right Channel

MSB -1 -2 -3 -4 +5 +4 +3 +2 +1 LSB

Internal SCLK Mode

I2S, Up to 24-Bit data and INT SCLK = 64 Fs if

MCLK/LRCK = 512, 256 or 128I2S, Up to 24-Bit data

and INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192

External SCLK Mode

I2S, up to 24-Bit DataData Valid on Rising Edge of

SCLK

LRCK

SCLK

SDATA

Figure 20. CS43L41 Format 0 (I2S)

Left Channel

Right Channel

MSB -1 -2 -3 -4 -5 +5 +4 +3 +2 +1 LSB

MSB -1 -2 -3 -4 +5 +4 +3 +2 +1 LSB

Internal SCLK Mode

I2S, 16-Bit data and INT SCLK = 32 Fs if

MCLK/LRCK = 512, 256 or 128I2S, Up to 24-Bit data

and INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192

External SCLK Mode

I2S, up to 24-Bit DataData Valid on Rising Edge of

SCLK

Figure 21. CS43L41 Format 1 (I2S)

LRCK

SCLK

SDATA

Left Channel

MSB -1 -2 -3 -4 -5 +5 +4 +3 +2 +1 LSB

Right Channel

MSB -1 -2 -3 -4 +5 +4 +3 +2 +1 LSB

Internal SCLK Mode

Left Justified, up to 24-Bit DataINT SCLK = 64 Fs if

MCLK/LRCK = 512, 256 or 128INT SCLK = 48 Fs if

MCLK/LRCK = 384 or 192

External SCLK Mode

Left Justified, up to 24-Bit DataData Valid on Rising

Edge of SCLK

Figure 22. CS43L41 Format 2

30

DS473PP1

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